Computer Architecture and Organisation
Architecture versus organisation
| Feature | Architecture | Organisation |
|---|---|---|
| Focus | Logical design: what the machine can do | Physical build: how it does it efficiently |
| Visible to the programmer? | Yes | No |
| Covers | Instruction set, addressing modes, data formats, I/O mechanisms, CPU design | Cache, DMA, interfaces, circuits, memory hierarchy |
Think of a building: the architecture is the blueprint; the organisation is the bricks, wiring and plumbing that realise it. DMA (Direct Memory Access) lets an I/O device move data to or from memory without troubling the CPU.
The five units of a computer
| Unit | Job |
|---|---|
| Input unit | Takes data from the user and converts it to binary |
| Memory unit | Holds data and instructions (RAM and ROM) |
| CPU | Processes everything; contains the ALU, Control Unit and registers |
| Output unit | Converts binary results back to a form people understand |
| Storage unit | Permanent secondary storage (HDD, SSD) |
The input unit is a converter and communicator: the keyboard turns key presses into ASCII or Unicode, the mouse turns movement into coordinates, the microphone turns sound into digital audio through an ADC. The output unit is the reverse converter: speakers use a DAC to turn digital audio back into sound.
ALU and Control Unit
- The ALU does arithmetic (+, −, ×, ÷), logic (AND, OR, NOT, XOR) and comparison (greater, less, equal). It takes both operands from registers, puts the result in the accumulator, and stores nothing itself.
- The Control Unit is the director. It fetches and decodes instructions, directs data between CPU, memory and I/O, and keeps everything in step with the system clock. It does not compute.
Fetch, decode, execute
| Stage | What happens | Registers involved |
|---|---|---|
| Fetch | The address in the PC goes to the MAR; the instruction is read through the MDR into the IR; the PC moves to the next address | PC, MAR, MDR, IR |
| Decode | The CU decodes the instruction in the IR into control signals | IR, decoder |
| Execute | The ALU performs the operation, or the CU moves data | ALU, AC, registers |
Memory cell and address
- A memory cell is the smallest addressable storage location, normally one byte (8 bits). It can hold data or an instruction.
- Every cell has a unique address, counted from 0 and written in binary or hexadecimal. The CPU puts the address on the address bus to read or write.
- With n address lines the CPU can reach 2^n locations. For example 16 lines give 2^16 = 65,536 locations (64 KB) in a byte-addressable memory.
| Feature | Byte addressable | Word addressable |
|---|---|---|
| Address unit | 1 byte | 1 word (2, 4 or 8 bytes) |
| Each step | Address rises by 1 byte | Address rises by 1 word |
| Flexibility | More precise | Less flexible, a little faster per fetch |
| Use | All modern computers | Older or specialised systems |
Buses in brief
- Address bus: one-way, CPU to memory or I/O. Its width fixes the memory capacity.
- Data bus: two-way. Its width (8, 16, 32, 64 bits) sets how much moves at once.
- Control bus: carries Read (RD), Write (WR), Wait and Ready signals and timing.
Registers at a glance
| Register | Full name | Key function | Connected to |
|---|---|---|---|
| AC | Accumulator | Holds ALU results | ALU |
| PC | Program Counter | Address of the next instruction (called Instruction Pointer, IP, on x86) | Control Unit |
| IR | Instruction Register | The instruction now being executed | Control Unit and decoder |
| SR / FR | Status or Flag Register | Condition flags Z, C, S, V | ALU and branch logic |
| MAR | Memory Address Register | Address to be accessed | Address bus |
| MDR / MBR | Memory Data (Buffer) Register | Data moving to or from memory | Data bus |
Flags: Z (zero) is set when a result is zero; C (carry) when an operation carries out; S (sign) shows positive or negative; V (overflow) when the result is too big for the data type. Conditional jump instructions read these flags.
Keep practising
Notes are only half the work. Test yourself with questions and discuss doubts with other aspirants.
Prepared for exam revision from standard computer textbooks, Microsoft documentation and official sources. Features differ between Excel and Word versions (2016, 2019, 2021, 365) so check which version your exam follows. Found a mistake? Tell us.